Signal propagation delay time is the time it takes a pulse to pass through a logic element or combination of logic elements and other circuit components on an integrated circuit. Although the delay time is usually fairly uniform among logic elements and components on the same integrated circuit, the delay time for all of the circuit components on an integrated circuit can vary with operating temperature. In addition, in some logic systems, as for instance in many emitter-coupled logic element arrangements, propagation delay time is dependent, within limits, on bias signals applied to one or more transistors in the arrangement. In many applications, such bias signals are typically fixed and do not vary during operation of the integrated circuit.
Though circuit designers often seek to minimize propagation delay time, in some applications it is equally important that delay time be consistent and predictable.
U.S. Pat. No. 4,641,048 of Pollock represents one approach for controlling integrated circuit propagation delay time. In Pollock, a phase locked ring oscillator is incorporated into the integrated circuit to be controlled. The oscillator includes a number of representative logic elements of the type wherein the propagation delay time through the elements are in part a function of an applied bias signal. The output of the ring oscillator (V.sub.p) is compared by a bias signal generator with a known reference signal (V.sub.ref). The bias signal generator produces a bias signal (V.sub.b) proportional to the time integral of the phase difference between V.sub.p and V.sub.ref. This variable bias signal V.sub.b is applied to all of the logic elements in the ring oscillator and to all controlled logic elements on the integrated circuit. As described in this patent, the bias signals are varied in a manner that maintains the propagation delay time through the ring oscillator at a substantially constant level. Since the same bias signal is applied to all other controlled logic elements on the integrated circuit, some control of the propagation delay times through the integrated circuit as a whole is also achieved.
The approach of varying bias signals to control propagation delay time has a number of limitations. For example, it has no affect on delay times through circuit elements in which delay time is not a function of an applied bias signal. In addition, it is not practical for use in connection with CMOS integrated circuits because of limitations on bias voltages in such circuits.
It is known that integrated circuits, such as CMOS circuits, exhibit propagation delay characteristics which vary with the temperature of the integrated circuit. In the past, integrated circuits have been placed in ovens with a temperature sensor coupled to the circuit. The temperature of the oven is then adjusted to maintain the oven temperature and, at least in theory, the temperature of the integrated circuit at a stable level. This approach is relatively expensive to implement and becomes impractical for devices which include many integrated circuits.
Therefore, a need exists for an improved means for regulating propagation delay time of signals passing through an integrated circuit, and more specifically for an improved means using heat to regulate propagation delay times.